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  digital demodulator copyright ? 2015 by silicon laboratories 11.20.15 hdtv mpeg s.o.c. si2162c host_scl host_sda front end osc & pll qam demod equal- izer i 2 c switch tun_sda tun_scl gpio ctrl mpeg ts interface i 2 c i/f gpio_0 resetb 1.2, 3.3v dsp & synchro dvb-t2/t/c2/c fec module ofdm demod equal- izer agcs adc mp_a/_b/_c/_d ext. clk or xtal silicon labs (si217x/5x/4x) tv tuner clk_in_out ldpc bch viterbi rs ts_err/ gpio_1 ts_sync ts_val 8 ts_clk ts_data tc_adc_p tc_adc_n 6l& '9%7&7&'ljlwdo79'hprgxodwru 'hvfulswlrq the si2162c integrates digital demodulators for all first and second generation dvb standards (dvb-t/t2/c/c2) in a single advanced cmos die. leveraging silicon labs' proven digital demodulation architecture, the si2162c achieves excellent reception performance for each media while significantly minimizing front-end design co mplexity, cost, and power dissipation. connecting the si2162c to a hybrid tv tuner or digital only tuner, such as silicon labs' si 217x/5x/4x devices, results in a high-performance and cost optimized tv or stb front-end solution. silicon labs' internally deve loped d v b-c2 demodulator can accept a standard if (36 mhz) or low-if input (differential) and support all modes specif ied by the dvb-c2 standard. the main features of the dvb-c2 mode are 4096-qam, 6 or 8 mhz bandwidth, management of notch insertion (broadband and narrowband), and support of multiple data slices and plps. dvb-t2/t and dvb-c2/c demodulators are next-generation enhanced versions of pr oven and broadly-used silicon labs si2169/68/67/66/64/62/60 devices. dvb-t2-lite (etsi en 302 755-v1.3.1) compatibility is also supported. the cable reception allows demodulating widely deployed dvb-c leg a cy standard (itu-t j.83 annex a/c) and the americas' cable standard (itu-t j.83 annex b). the si2162c offers an on-chip bl ind scan algor ith m for dvb-c/c2 standards, as well as a blind lock function. the si2162c programmable transport stream output interface provides a flexible range of output modes and is fully compatible with all mpeg decoders or conditional access m odules to support any customer application. features - pin-to-pin compatible with al l si216x/8x single demods family - api compatible with all single and dual demods families - dvb-t2 (etsi en 302 755-v1.4.1) with t2-lite (annex i) - bandwidth: 1.7, 5, 6, 7, and 8 mhz - nordig unified 2.5 and d-book 8 compliant - dvb-c2 (etsi en 302 769) - 16-qam to 4096-qam ofdm demodulation - dvb-t (etsi en 300 744) - ofdm demodulator and enhanced fec decoder - nordig unified 2.5 and d-book 8 compliant - dvb-c (etsi en 300 429) and itu-t j.83 annex a/b/c - qam demodulator and fec decoder - 1 to 7.2 msymbol/s - ldpc and bch fec decoding for c2/t2 standards - i 2 c serial bus interfac es (master and host) - firmware control (embedded rom/nvm) - upgradeable with patch download via fast spi or i 2 c ? (broadcast mode supported) - flexible ts output interface (serial, parallel, and slave) - fast lock times for all media - low power consumption - two power supplies: 1.2 and 3.3 v - 7x7 mm, qfn-48 pin package, pb-free/rohs compliant applications - idtv: on-board design or in a nim - advanced multimedia stb, pvr, and blu-ray recorders - pc-tv accessories
digital demodulator copyright ? 2015 by silicon laboratories 11.20.15 silicon laboratories and silicon labs are trademarks of silicon laboratories inc. other products or brandnames mentioned her ein are trademarks or registered tr ademarks of their respective holders SI2162-C60 dvb-t2/c2/t/c digital tv demodulator selected electrical specifications (t a = C10 to 75 c) parameter test condition min typ max unit general input clock reference 4 30 mhz supported xtal frequency 16 30 mhz total power consumption dvb-t2 1 356 mw dvb-t 2 182 mw dvb-c2 3 327 mw dvb-c 4 142 mw thermal resistance 2 layer pcb 35 c/w 4 layer pcb 23 c/w power supplies v dd _ vcore 1.14 1.20 1.30 v v dd _ vana 3.00 3.30 3.60 v v dd _ vio 3.00 3.30 3.60 v notes: 1. t est conditions: 8 mh z, 256-qam, 32k fft, cr = 3/5, gi = 1/128, pp7, parallel ts, c/n at picture failure. 2. t est conditions: 8 m hz, 8k fft, 64-qam, parallel ts. 3. test conditions: 4096-qam, cr = 5/ 6, gi = 1/128, c/n = 34 db (at picture failure). 4. test conditions: 6.9 mb aud, 256-qam, parallel ts. pin assignments selection guide part number description SI2162-C60-gm dvb-t2/c2/t/c digital tv demodulator, 7x7 mm qfn-48 si2162c (gnd_pad) qfn-48 7x7mm 34 35 36 21 22 23 24 3 4 5 33 20 6 32 7 28 29 30 31 27 8 9 10 11 12 15 16 17 18 19 40 39 38 37 41 46 45 44 43 42 mp_a nc nc nc nc sda_mast scl_mast nc tc_adc_p tc_adc_n nc mp_b scl_host nc gnd sda_host ts_val nc ts_data[1] ts_data[5] ts_data[4] ts_data[3] gnd vdd_vio ts_data[2] ts_data[0]/ts_ser ts_clk ts_sync 47 14 ts_data[7] resetb xtal_i/clk_in xtal_o gnd vdd_vcore vdd_vana addr gnd gpio_0 48 13 2 1 26 25 ts_data[6] ts_err/gpio_1 clk_in_out gnd vdd_vcore vdd_vcore vdd_vio vdd_vcore mp_d mp_c


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